OV2710感光芯片SENSOR

《OV2710感光芯片SENSOR》由会员分享，可在线阅读，更多相关《OV2710感光芯片SENSOR（89页珍藏版）》请在装配图网上搜索。

1、OV2710 1080p/720p HD color CMOS image sen sor with Omn iPixel3-HS? tech nology Omfl^56ion datasheet PRODUCT SPECIFICATION 1/2.7" 1080p/720p HD color CMOS image sensor with Omn iPixel3-HS? tech no logy 00 Copyright ? 2011 OmniVision Technologies, Inc. All rights reserved. This document i

2、s provided “as is ” with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. OmniVision Technologies, Inc. and all its affiliates disclaim all lia

3、bility, including liability for infringement of any proprietary rights, relating to the use of information in this document. No license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. The information contained in this document is considered pr

4、oprietary to OmniVision Technologies, Inc. and all its affiliates. This information may be distributed to individuals or organizations authorized by OmniVision Technologies, Inc. to receive said information. Individuals and/or organizations are not allowed to re-distribute said information. Tradema

5、rk Information OmniVision and the OmniVision logo are registered trademarks of OmniVision Technologies, Inc. OmniPixel3-HS is a trademark of OmniVision Technologies, Inc. All other trademarks used herein are the property of their respective owners. 1080p/720p HD color CMOS image sensor with OmniP

6、ixel3-HS? technology datasheet (CSP3) PRODUCT SPECIFICATION version 2.03 april 2011 To learn more about OmniVision Technologies, visit . OmniVision Technologies is publicly traded on NASDAQ under the symbol OVTI. 04.06.2011 PRODUCT SPECIFICATION proprietary to OmniVision Technologies

7、OmH^3lhion, 00 applicati ons notebook computers high-end video conferencing security orderi ng in formati on OV02710-A68A (color, lead-free) 68-pi n CSP3 integrated auto focus filter support for digital video port (DVP) support for one lane MIPI interface (up to 800 Mbps)

8、 support for output formats: 8-/10-bit RAW RGB support for image sizes: 1080p @ 30 fps, cropped 720p @ 60 fps, and VGA @ 60 fps support for black sun cancellation embedded one-time programmable (OTP) memory on-chip phase lock loop (PLL) built-in 1.5V regulator for core 00 features programm

9、able controls: gain, exposure, frame rate, image size, horizontal mirror, vertical flip, cropping, windowing, and panning automatic image control functions: automatic exposure (AEC), automatic gain control (AGC), automatic white balance (AWB) and automatic black level calibration (ABLC) serial cam

10、era control bus (SCCB) lens correction (LENC) defect pixel correction (DPC) digital video port (DVP) parallel output interface operating: -30 ° C to 85 ° C junction temperature (see table 8-2) stable image: 0 ° C to 65 ° C junction temperature (see table 8-2) output interfaces:

11、10-bit parallel / one-lane MIPI output formats: RAW RGB (10-bit) 00 key specificatio ns (typical) active array size: 1920x1080 power supply: analog: 3.0 〜3.6V (3.3 V typical) core: 1.425〜1.575V (1.5V typical) I/O: 1.7〜3.6V (1.8V typical) power requirements: active: 350 mW power down:

12、70 gA temperature range: lens size: 1/2.7" lens chief ray angle: 23.6 ° (seegure 10-2 ) input clock frequency: 6 〜27 MHz scan mode: progressive maximum image transfer rate: 1080p: 30 fps cropped 720p: 60 fps VGA: 120 fps QVGA: 240 fps sensitivity: 3300 mV/Lux-sec shutter: rolling max S/

13、N ratio: 39 dB dynamic range: 69 dB @ 8x gain maximum exposure interval: 1096 tline pixel size: 3 g m x 3 gm dark current: 20 mV/s @ 60 ° C junction temperature image area: 5856 g m x 3276 gm package dimensions: 7465 g m x 5865 gm iii 00 table of contents 1 signal descriptions 1-1 2 syst

14、em level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame rate 2-6 2.4 I/O control 2-6 2.5 SCCB interface 2-8 2.6 MIPI interface 2-9 2.7 external components 2-9 2.8 power up sequence 2-10 2.8.1 power up with internal DVDD 2-10 2.8.2 power up with external DVDD sou

15、rce 2-11 2.9 power management 2-12 2.10 power ON reset generation 2-12 2.11 system clock control 2-12 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 binning 3-2 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3

16、■ 4.4 AEC/AGC algorithm 4-3 2.8 overview 4-3 2.9 AEC algorithm 4-4 2.8.1 AEC/AGC steps 4-6 1. auto exposure control (AEC) 4-6 2. manual exposure control 4-7 3. auto gain control (AGC) 4-7 4. manual gain control 4-7 4. black level calibration (BLC) 4-8 5 image sensor processor digital functi

17、ons 5-1 5.1 system control 5-1 04.06.2011 PRODUCT SPECIFICATION proprietary to Omn iVisio n Tech no logies OmH^3lhion, OV2710 1080p/720p HD color CMOS image sensor with Omn iPixel3-HS? tech no logy 6 image sensor output interface digital functions 6-1 6.1 digital video port (DVP) 6-1

18、 6.1.1 overview 6-1 6.1.2 DVP timing 6-2 6.2 mobile industry processor interface (MIPI) 6-2 7 register tables 7-1 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 DC characteristics 8-2 8.4 AC characteristics 8-3 9 m

19、echanical specifications 9-1 9.1 physical specifications 9-1 9.2 IR reflow specifications 9-2 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (CRA) 10-2 Omrfl■那 ion. proprietary to OmniVision Technologies PRODUCT SPECIFICATION version 2.0

20、3 vii 00 list of figures figure 1-1 pin diagram 1-3 figure 2-1 OV2710 block diagram 2-2 figure 2-2 reference design schematic 2-3 figure 2-3 CSP3 flex module schematic 2-4 figure 2-4 CSP3 flex with MIPI schematic 2-5 figure 2-5 power up timing with internal DVDD 2-10 figure

21、2-6 power up timing with external DVDD source 2-11 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 desired convergence 4-5 fi

22、gure 6-1 DVP timing diagram 6-2 figure 9-1 package specifications 9-1 figure 9-2 IR reflow ramp rate requirements 9-2 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (CRA) 10-2 04.06.2011 PRODUCT SPECIFICATION proprietary to Omn iVisio n Tech no logies OmH^3lhion,

23、 00 list of tables table 1-1 signal descriptions 1-1 table 2-1 formats and frame rates 2-6 table 2-2 driving capability and direction control for I/O pads 2-6 table 2-3 group sharing registers 2-8 table 2-4 group write register 2-8 table 3-1 binning-related registers 3-2 table 4-

24、1 mirror and flip registers 4-1 table 4-2 image cropping control functions 4-2 table 4-3 test pattern selection control 4-3 table 4-4 AEC/AGC control functions ” 4-4 table 4-5 AEC control functions 4-5 table 4-6 BLC control functions 4-8 table 5-1 system control registers 5-1 ta

25、ble 6-1 DVP control registers 6-1 table 6-2 DVP timing specifications 6-2 table 7-1 SC control registers 7-1 table 7-2 SCCB control registers 7-4 table 7-3 group sharing registers 7-4 table 7-4 analog registers 7-5 table 7-5 timing control registers 7-5 table 7-6 AEC/AGC regist

26、ers 7-6 table 7-7 OTP registers 7-9 table 7-8 BLC registers 7-11 table 7-9 FC control registers 7-12 table 7-10 DVP registers 7-12 table 7-11 MIPI registers 7-13 table 7-12 ISP control registers 7-17 table 7-13 AWB control registers 7-19 table 7-14 AVG registers 7-21 table

27、7-15 DPC registers 7-22 table 7-16 LENC registers 7-24 table 7-17 AFC registers 7-27 OV2710 1080p/720p HD color CMOS image sensor with Omn iPixel3-HS? tech no logy table 8-1 absolute maximum ratings 8-1 table 8-2 functional temperature 8-1 table 8-3 DC characteristics (-30

28、° C < TJ < 85 ° C) 8-2 table 8-4 AC characteristics (TA = 25 ° C, VDD-A = 2.8V) 8-3 table 8-5 timing characteristics 8-3 table 9-1 package dimensions 9-1 table 9-2 reflow conditions 9-2 table 10-1 CRA versus image height plot 10-2 Omrfl■那 ion. proprietary to OmniVision Te

29、chnologies PRODUCT SPECIFICATION version 2.03 1-3 8 sig nal descripti ons table 1-1 lists the signal descriptions and their corresponding pin numbers for the OV2710 image sensor. The package information is shown in section 9 . table 1-1 sig nal descripti ons (sheet 1 of 3) pin number sign

30、al name pin type description A1 NC — no connect A2 NC — no connect A3 NC — no connect A4 NC — no connect A5 SVDD power power for sensor circuit A6 SGND ground ground for sensor circuit A7 SVDD power power for sensor circuit A8 RESETB input reset (active low with int

31、ernal pull up resistor) A9 DOGND ground ground for I/O circuit A10 VHT reference internal analog reference A11 VN reference internal analog reference B1 AVDD power power for analog circuit B2 NC - no connect B3 NC — no connect B4 NC — no connect B5 NC — no connect B6

32、 SGND ground ground for sensor circuit B7 TMa input test mode (active high with internal pull down resistor) B8 PWDN input power down (active high with internal pull down resistor) B9 DOVDD power power for I/O circuit B10 VH reference internal analog reference B11 AVDD power p

33、ower for analog circuit C1 AGND ground ground for analog circuit C2 NC — no connect C10 NC — no connect C11 AGND ground ground for analog circuit 04.06.2011 PRODUCT SPECIFICATION proprietary to OmniVision Technologies OmH^3lhion, table 1-1 sig nal descripti ons (sheet 2 of 3)

34、pin number signal name pin type description D1 AVDD power power for analog circuit D2 NC — no connect D10 NC — no connect D11 AGND ground ground for analog circuit E1 NC — no connect E2 NC — no connect E10 NC no connect E11 AVDD power power for analog circuit F1

35、 NC no connect F2 NC L - no connect F10 NC — no connect F11 NC — no connect G1 DGND ground ground for digital circuit G2 XVCLK input system input clock G3 NC — no connect G4 EVDD power power for MIPI G5 D3 I/O DVP data output 3 G6 DOVDD power power for I/O cir

36、cuit G7 NC — no connect G8 NC — no connect G9 SIOC input SCCB input clock G10 DGND ground ground for digital circuit G11 NC — no connect H1 PVDD power power for PLL circuit H2 VSYNC I/O DVP VSYNC output / MIPI TX clock lane positive output H3 HREF I/O DVP HREF output

37、/ MIPI TX clock lane negative output H4 D9 I/O DVP data output 9 (MSB) / MIPI TX data lane positive output H5 D7 I/O DVP data output 7 / MIPI TX data lane negative output H6 DOVDD power power for I/O circuit H7 DOGND ground ground for I/O circuit table 1-1 sig nal descripti ons (s

38、heet 3 of 3) pin number signal name pin type description H8 D2 I/O DVP data output 2 (LSB for 8-bit mode) H9 D6 I/O DVP data output 6 H10 SIOD I/O SCCB data H11 DVDD power power for digital circuit I1 PVDD power power for PLL circuit I3 EGND ground ground for MIPI 15 D5

39、 I/O DVP data output 5 I6 D1 I/O DVP data output 1 I7 PCLK I/O DVP PCLK output 18 D0 I/O DVP data output 0 (LSB for 10-bit mode) 19 D4 I/O DVP data output 4 I10 D8 I/O DVP data output 8 a. should be connected to DOGND figure 1-1 pin diagram Yd :A1 1 ■A2 - A3 A4 . A5 .

40、 ■A6 A7 A8 . A9. ■A10- A11 B-„-P 二■工 ■. y NC NC NC NC SVDD SGND SVDD RESETB DOGND VHT VN $严" :B1 1 :B2 1 .B3. B4 B5 ■ ::B6 I B7 B8 ■ B9 I :B10- B11 AVDD NC NC NC NC SGND TM PWDN DOVDD VH AVDD 討■■哲 :C1 1 :'C2 -

41、 :C10 C11 r |厂 ―扌 AGND NC NC AGND ：D1 1 ■D2 - :D10 D11 J/ AVDD NC NC AGND ；E1 I ■E2 1 OV2710 .E10- E11 NC NC NC AVDD ：'F1 ：l ■F2 i F10：, F11 NC

42、NC NC NC .G1 I ；G2 -G3 G4 G5 - ；G6 ■G7 G8 G9l G10 G11 ■ _ J』 -・・』 J卢 DGND XVCLK NC EVDD D3 DOVDD NC NC SIOC DGND NC .H1 i :H2' j 尸叫 -H3. H4：l Zri，,u H5 * !H6 ■-H7 ■B，""h H8J .H9I .H10 H11 ■■■■ "■as* PVDD VSYNC

43、 HREF D9 D7 DOVDD DOGND D2 D6 SIOD DVDD ji ■■怜 J«E・・ :I1 I -I3 - I5 ,t *・・J :I6 1 ：」7 I8 i .I9 I J ■丿 ：I10：： PVDD EGND D5 D1 PCLK D0 D4 D8 2710 CSP DS 1 1 2-3 9 system level descripti on 9.1 overview The OV2710 (color) image sen

44、sor is a low voltage, high performance 1/2.7-inch full size HD CMOS image sensor that provides the full functionality of a single 1080p (1920x1080) camera using OmniPixel3-HS? technology in a small footprint package. It provides full-frame, sub-sampled and windowed 10-bit images in various formats v

45、ia the control of the Serial Camera Control Bus (SCCB) interface or MIPI interface. The OV2710 has an image array capable of operating at up to 30 frames per second (fps) in 1080P resolution with complete user control over image quality, formatting and output data transfer. All required image proce

46、ssing functions, including exposure control, white balance, defective pixel canceling, lens shading correction etc., are programmable through the SCCB interface. In addition, OmniVision image sensors use proprietary sensor technology to improve image quality by reducing or eliminating common lightin

47、g/electrical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. For customized information purposes, the OV2710 includes a one-time programmable (OTP) memory. The OV2710 has a one lane MIPI interface and a traditional paralle

48、l digital video port (DVP). 9.2 architecture The OV2710 sensor core generates stream pixel data at a constant frame rate, indicated by HREF, VSYNC, and PCLK. figure 2-1 shows the functional block diagram of the OV2710 image sensor. The timing generator outputs signals to access the rows of the im

49、age array, precharging and sampling the rows of array in series. In the time between pre-charging and sampling a row, the charge in the pixels decreases with the time exposed to the incident light. This is known as exposure time. The exposure time is controlled by adjusting the time interval betwee

50、n precharging and sampling. After the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. Following analog processing is the ADC which outputs 10-bit data for each pixel in the array. figure 2-

51、1 OV2710 block diagram OV2710 04.06.2011 PRODUCT SPECIFICATION proprietary to OmniVision Technologies OmH^3lhion, m AM image array gain control image sen sor core image sen sor processor PLL SCCB slave in terface image output in terface con trol register bank D[9:0] MCP/N (VSYNC/HREF

52、) MDP/N (D9/D7) r tim ing gen erator and system con trol logic id_m 弹.Dofe — cofe KLCVX 10-bit ADC klcp fekh CNXS BIES_tR N_D wp colum n sample/hold figure 2-2 refere nee desig n schematic D V I P D D卜 D B1 B11 D1 E

53、11 H1 I1 AVDD AVDD AVDD AVDD PVDD G4 A5 A7 D0 D1 D2 D3 D4 D5 PVDD EVDD SVDD SVDD U2 OV2710 CSP3 D6 D7 D8 D9 THU B9' DVDD G6 1H6 note 1 " R6 50-0603 MDP R7 50-0603 MDN R8 50-0603 MCP R9 50-0603 MCN 12 3 4 VSYNC R10 0-0603 MCP HREF R12 0-0603 MCN D9

54、R14 0-0603 MDP ' D7 R16 0-0603 MDN . Tninr note 2 — .“a a—Slid—.ilib— —ill..-. VSYNC R11 0-0603 VSYNC-P i HREF R13 0-0603 HREFLP : D9 R15 0-0603 D9_P； D7 R17 0-0603 D7_P : wv note 1 assemble only for MIPI testing note 2 do not assemble if MIPI is used note 3 please do

55、not assemble R19 VSYNC HREF DOVDD DOVDD DOVDD 3 3 3 0 10K-0603 PCLK XVCLK SIOD SIOC -3 6 0 0 3 0 DVDD 0-0603 EVDD note 3 AVDD R18 0-0603 R19 0-0603 I8 D0 I6 D1 H8 D2 G5 D3 I9 D4 I5 —D5 H9 D6 H5 D7 I10 D8 H4 D9 H3 HREF I7 PCLK G2 XVCLK H10 SIOD G9 SI

56、OC D3 21 D3 D2 D5 D4 D7 D6 D9 D8 RESET PWDN NC SIOD HREF SIOC VSYNcN GND PCLK 2 GND PWR XCLK PWR GND D1 D0 NC NC NC NC NC NC GND GND 20 XVCLK 18 12 SIOD 14 SIOC 16 NDWP 3u6n~ nul ■ r 4K 22 26 28 30 二 32 pwr ui XC62FP3302-SOT89 3.3V

57、tr 3.3(HI-L1008 VIN OUT GND 3.3(HI-L1008 pwr U3 XC6206P152PR 1.5V PVDD AVDD DVDD —D VIN OUT 1 GND 3 L3 3.3(H-L1008 TT pwr U4 XC62FP1802-SOT89 1.8V DOVDD C 2710 CSP DS2 2 OV2710 1080p/720p HD color CMO

58、S image sen sor with Omn iPixel3-HS? tech nology Omrfl■那 ion. proprietary to OmniVision Technologies PRODUCT SPECIFICATION version 2.03 figure 2-3 CSP3 flex module schematic NNNNNNNNNNNNNNNNNNN N N N N 18 DO DO DVDD DOVDD A7 H11 B9 G6 H6 B p 1 note 1 PWDN should

59、be connected to ground outside of module if unused. note 2 RESETB should be connected to DOVDD outside of module if unused. N AVDD F f 1 0 note 3 AVDD is 3.0~3.6V of sensor analog power (clean). 3.3V is typical. note 4 DOVDD is 1.7~3.6V of sensor digital IO power (clean). 1.8V is typical.

60、note 5 DVDD is 1.5V of sensor core power (clean). Internal regulator (no external 1.5V DVDD is needed) is recommended for 1.8V DOVDD. External 1.5V DVDD is recommended for 2.8V DOVDD. note 6 sensor AGND and DGND should be separated and connected to a single point outside PCB (do not connect inside

61、 module). note 7 DGND and EGND should be two separated nets, and only connected at a single point close to pin 39 or 40 of JP1. note 8 capacitors should be close to the related sensor pins. note 9 if more space available, use cap of 1 fF-0402 for C5 between DVDD and DGND. note 10 D[9:0] (D9:MSB,

62、 D0:LSB) is sensor RGB RAW 10-bit output. D[9:2] (D9:MSB, D2:LSB) is RGB RAW 8-bit output. AVDD 0.1 fF-0201 D1 E11 H1 匸: I1 G4 AGND" SIOD —cwTW Xe—OM or elDac XCUM-& 0 1 2 3 45678901234 234567891111 11111122222 3 c耳 C 1 E > 「3 耳 * 2 3 4 2 3 4 5\ 2 fl A A A B B B

63、 B C ；C C C C C C C C C 2 1 [0] D D E E E C C C C ,C A5 C7 0.1 fF-0201 B1 4 l B11 C D AVDD AVDD AVDD AVDD PVDD PVDD EVDD SVDD SVDD DVDD DOVDD DOVDD DOVDD U1 OV2710 CSP3 ND wp btllwer mt TH V H V NV DNGOD DNGOD DNGD DNGD DNGE RGS RGS DNG A DNG A DNG A T

64、 I6 D1 2 H8 D2 :G5 D3 19 D4 匚15 D5 H9 D6 7H5 D7 £ I10 D8 9 H4 D9 -H2 VSYNC F H3 HREF KI7 PCLK G2 XVCLK r H10 SIOD CG9 SIOC AVDD SIOC RESETI VSYNC PWDN HREF DVDD DOVDD D9 XVCLK D8 DGND D7 PCLK D6 D2 D5 D3 D4 D1 D0 3 2 s D p s c o 271

65、 2-5 04.06.2011 PRODUCT SPECIFICATION proprietary to OmniVision Technologies OmH^3lhion, figure 2-4 CSP3 flex with MIPI schematic C70 .1 gF-0201 DVDD DOVDD rn AGND 3 X- SIOD DO SIOC G9 SIOC K

66、 B9 G6 H6 P rh 2710_CSP_DS_2_4 AVDD B11 D1 E11 H1 ~I? G4 A5 A7 H11 >VS4.O- SO4- B21YRT SRHV右J 99 21 23药 27^y 3 5 7 9 3 3 3 0 AVDD AVDD AVDD AVDD PVDD PVDD EVDD SVDD SVDD DVDD DOVDD DOVDD DOVDD U1 OV2710 CSP3 D1 D2 D3 D4 D5 D6 D7 D8 D9 VSYNC HREF PCLK XVCLK SIOD I6 D1 H8 D2 G5 D3 I9 D4 I5 D5 H9 D6 H5 D7_MDN I10 D8 H4 D9-MDP H2 VSYNC_MCP H3 HREF_MCN I7 PCLK G2 XVCLK H10 SIOD 18 DO SIOC RESETB PCLK